Typically, in an active-matrix-drive liquid crystal display (LCD) incorporating thin film transistors (TFTs), the DC level of a common electrode signal is adjusted for each panel.
The adjustment is done to carry out such compensation that maintains the potential difference between a pixel electrode and a common electrode at a suitable value, because, among other reasons, a drain voltage varies due to the effects of the parasitic capacity of a TFT when the TFT is switched from ON to OFF as disclosed in Japanese Publication for Examined Patent Application No. 7-120146/1995 (Tokukohei 7-120146; published on Dec. 20, 1995).
In other words, variations in the drain voltage caused by the effects of a parasitic capacity of the TFT are erratic and contain irregularity that occur with each panel in manufacture. Therefore, an arrangement is made to adjust the DC level (DC voltage) for each panel.
Specifically, for example, a common electrode signal generator circuit 50 as shown in FIG. 8 is used as a circuit to adjust the DC level, i.e., the voltage level, of the common electrode signal. In the figure, a common electrode signal VCOM is produced by means of a C-MOS (Complementary Metal Oxide Semiconductor) switch 51 switching between a positive power source VDD and a ground potential GND according to a control signal VIN.
More specifically, in the common electrode signal generator circuit 50, the common electrode signal VCOM is produced by combining the output from the positive power source VDD and the output from the C-MOS switch 51 and a capacitor 58 in a clamp circuit 57 composed of two transistors 52, 53, two resistors 54, 55, and a variable resistor 56. The DC level of the common electrode signal VCOM is adjusted by varying the variable resistor 56 in the clamp circuit 57. In this manner, the DC level as the potential difference between the common electrode signal VCOM and a pixel electrode (not shown) is adjusted to an optimum value in light of variations in the drain voltage caused by the effects of a parasitic capacity of the TFT.
Meanwhile, as shown in FIGS. 9 and 10, a source driver 61 for supplying source signal voltages to source signal lines of the TFT-LCD panel is typically of a 6 to 8 bit R-DAC type and carries out digital-to-analog conversion (D/A conversion) based on reference voltages V1 to V4 fed from an external reference voltage generator circuit 62 to produce source signal voltages. Here, the plurality of reference voltages V1 to V4 are used, because the dielectric constant of liquid crystal varies with applied voltages.
Also, the effects of a parasitic capacity of TFTs 63 on a drain voltage change with the voltage applied to liquid crystal. Therefore, the DC level needs be switched for a white display and a black display, as disclosed in the U.S. Pat. No. 5,402,142 (issued: Mar. 28, 1995) among others. Accordingly, as shown in FIG. 10, by dividing the voltage difference between the ground potential GND and an high reference voltage VHIGH fixed, for example, at about 4 V with resistors R21, R22, R23, R24, R25, switches SW1, SW3, SW5, SW7 are turned on according to a signal φ to supply reference voltages V1 to V4 to the source driver 61. Meanwhile, by dividing the high reference voltage VHIGH with resistors R11, R12, R13, R14, R15, switches SW2, SW4, SW6, SW8 are turned on according to a signal φ to supply to the source driver 61 reference voltages V′1 to V′4 (not shown) that are different from the reference voltages V1 to V4.
In other words, according to the foregoing technique, D/A conversion is carried out based on the reference voltages V1 to V4 or reference voltages V′1 to V′4, which is equivalent to simultaneous execution of a non-linear conversion that matches with characteristics of liquid crystal and a gamma correction that compensates for differences between applied voltage-transmittivity characteristics of liquid crystal and the optic nature of the human eye.
However, in drive circuits in conventional liquid crystal displays, like the one above, the clamp circuit 57 serves as a common electrode signal generator circuit 50 that adjusts the common electrode signal VCOM; therefore, the resistor 55 and the variable resistor 56 in the clamp circuit 57 always receive the positive power source VDD. The clamp circuit 57 hence is power consuming and does not make a suitable application in the TFT-LCD for use in portable and other electronics where low power consumption is essential.
Besides, in the conventional common electrode signal generator circuit 50, the common electrode signal VCOM is switched between a +5 V positive power source VDD and a 0 V ground potential GND according to a control signal VIN, and an alternating signal that alternates between voltages, for example, +4 V and −1 V is produced by a D/A conversion by the resistors 54, 55, variable resistor 56, and capacitor 58 in the clamp circuit 57.
However, a problem occurs if the clamp circuit 57 and the capacitor 58 are interposed: it becomes difficult to produce a stable common electrode signal VCOM. Specifically, for example, when the C-MOS switch 51 is switched to a +5 V positive power source VDD by the control signal VIN, the DC level of the common electrode signal VCOM varies and cannot be maintained at +4 V. When the C-MOS switch 51 is switched again to an D/A-converted alternating signal, the alternating signal starts from the varying DC level and the common electrode signal VCOM gradually returns to an alternating voltage between +4 V and −1 V.
As described above, the common electrodes cannot be maintained at a stable DC level with the conventional common electrode signal generator circuit 50 incorporating the clamp circuit 57 and capacitor 58 without periodical D/A conversions. The conventional common electrode signal generator circuit 50 therefore cannot be used for low frequency drive and suspension drive.
If the pixel electrode is made of a plurality of kinds of metal film layers, irregularities develop in DC voltage component between the drain of the thin film transistor and the one of the plurality of kinds of metal film layers that constitutes the pixel electrode electrically connected to the drain and that is located closer to a liquid crystal layer than the other metal film(s). For example, if aluminum (Al) is vapor-deposited or otherwise formed on the drain electrode, and the pixel electrode is made of a plurality of kinds of metal film layers, a plurality of kinds of metals exist between the drain electrode and an aluminum (Al) or other metal film that constitutes the pixel electrode and that is in contact with the liquid crystal; therefore, a potential difference develops between the drain electrode and the aluminum (Al).
The aforementioned conventional adjusting means is effective in adjustment of the potential difference developing in this manner between a plurality of kinds of metal film layers, but is still power consuming and has other problems too.
Variations in the DC level of the liquid crystal layer are caused also by other factors: for example, asymmetry in properties between the active matrix substrate and the opposite substrate sandwiching the liquid crystal layer. The DC component caused by the asymmetry between the active matrix substrate and the opposite substrate always acts on the liquid crystal layer.
Asymmetry between the substrates can be found, for example, in the thickness of the aligning film, the material composing the aligning film as in a case of hybrid alignment, and the material composing the electrodes positioned oppositely across the liquid crystal layer as in a case of a reflective liquid crystal display where the reflective electrodes on the active matrix substrate are made of aluminum (Al) and the transparent electrodes on the opposite substrate are made of ITO. Among these factors, the asymmetry in the material composing the electrodes positioned oppositely across the liquid crystal layer causes largest variations in the DC level.
In addition, these DC level variations caused by different electrode materials are not computable, and adjusting the potential of a common electrode is a time-consuming process, during which the DC continues to act on the liquid crystal layer. This degrades the reliability of the liquid crystal display and results in persistent residual image and other undesirable effects.
Although the aforementioned conventional adjusting circuit is capable of adjusting the DC component caused by the asymmetry between the active matrix substrate and the opposite substrate sandwiching the liquid crystal layer, it still consumes large amounts of power.